XC2C384-10TQ144I

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Main description CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 125MHz 0.18um Technology 1.8V 144-Pin TQFP
CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 125MHz 0.18um Technology 1.8V 144-Pin TQFP

Informacje podstawowe

  • ProducentXilinx
  • EURoHSNo (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 180
  • Inventory 1
  • PCNs 23
  • GIDEP-Alerts 1
  • MaskPart XC2C38410TQ144I%
  • IntroductionDate Sep 26, 2001

Parametry

  • Clock Management Doubler/Divider
  • Copy Protection Yes
  • Data Gate Yes
  • Device Logic Cells N/A
  • Device System Gates 9000
  • Family Name CoolRunner -II
  • I/O Voltage (V) 1.5|1.8|2.5|3.3
  • In-System Programmability Yes
  • Individual Output Enable Control No
  • Maximum Clock to Output Delay (ns) 7.9
  • Maximum Internal Frequency (MHz) 166
  • Maximum Operating Current (mA) N/A
  • Maximum Operating Frequency (MHz) 125
  • Maximum Operating Supply Voltage (V) 1.9
  • Maximum Operating Temperature (°C) 85
  • Maximum Propagation Delay Time (ns) 10
  • Maximum Storage Temperature (°C) 150
  • Memory Size (Kbit) N/R
  • Minimum Operating Supply Voltage (V) 1.7
  • Minimum Operating Temperature (°C) -40
  • Minimum Storage Temperature (°C) -65
  • Number of Flip Flops N/A
  • Number of Global Clocks 3
  • Number of I/O Banks 4
  • Number of Inter Dielectric Layers 4/5
  • Number of Logic Blocks/Elements 24
  • Number of Macro Cells 384
  • Number of Product Terms per Macro 40
  • Number of User I/Os 118
  • Process Technology 0.18um
  • Program Memory Type ROMLess
  • Programmability Yes
  • RAM Bits (Kbit) N/A
  • Reprogrammability Support No
  • Speed Grade 10
  • Supplier Temperature Grade Industrial
  • Temperature Flag Opr
  • Tolerant Configuration Interface Voltage (V) 3.3
  • Tradename CoolRunner
  • Typical Operating Supply Voltage (V) 1.8
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