IS62WV10248DBLL-55TLI

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Main description SRAM Chip Async Single 2.5V/3.3V 8M-bit 1M x 8 55ns 44-Pin TSOP-II
SRAM Chip Async Single 2.5V/3.3V 8M-bit 1M x 8 55ns 44-Pin TSOP-II

Informacje podstawowe

  • ProducentIntegrated Silicon Solution Inc
  • EURoHSYes (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 83
  • Inventory 3
  • PCNs 4
  • MaskPart IS62WV10248DBLL55TLI%
  • IntroductionDate May 14, 2009

Parametry

  • Address Bus Width (bit) 20
  • Architecture N/R
  • Data Rate Architecture N/R
  • Density (bit) 8M
  • Function N/A
  • Maximum Access Time (ns) 55
  • Maximum Clock Rate (MHz) N/R
  • Maximum Operating Current (mA) 25
  • Maximum Operating Supply Voltage (V) 3.6
  • Maximum Operating Temperature (°C) 85
  • Maximum Storage Temperature (°C) 150
  • Minimum Operating Supply Voltage (V) 2.4
  • Minimum Operating Temperature (°C) -40
  • Minimum Storage Temperature (°C) -65
  • Number of Bits per Word (bit) 8
  • Number of I/O Lines (bit) 8
  • Number of Ports 1
  • Number of Words 1M
  • Supplier Temperature Grade Industrial
  • Timing Type Asynchronous
  • Typical Operating Supply Voltage (V) 2.5|3.3
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