IS61C1024AL-12TLI
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Main description | SRAM Chip Async Single 5V 1M-bit 128K x 8 12ns 32-Pin TSOP-I |
SRAM Chip Async Single 5V 1M-bit 128K x 8 12ns 32-Pin TSOP-I
Informacje podstawowe
- ProducentIntegrated Silicon Solution Inc
- EURoHSYes (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 636
- Inventory 3
- PCNs 5
- MaskPart IS61C1024AL12TLI%
- IntroductionDate Sep 24, 2004
Parametry
- Address Bus Width (bit) 17
- Architecture N/R
- Data Rate Architecture N/R
- Density (bit) 1M
- Density in Bits (bit) 1048576
- Function N/A
- Maximum Access Time (ns) 12
- Maximum Clock Rate (MHz) N/R
- Maximum Storage Temperature (°C) 150
- Minimum Storage Temperature (°C) -65
- Number of Bits per Word (bit) 8
- Number of I/O Lines (bit) 8
- Number of Ports 1
- Number of Words 128K
- Supplier Temperature Grade Industrial
- Timing Type Asynchronous