IS61C1024AL-12JLI
| Do pobrania | Download |
|---|---|
| Main description | SRAM Chip Async Single 5V 1M-bit 128K x 8 12ns 32-Pin SOJ |
SRAM Chip Async Single 5V 1M-bit 128K x 8 12ns 32-Pin SOJ
Informacje podstawowe
- ProducentIntegrated Silicon Solution Inc
- EURoHSYes (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 807
- Inventory 5
- PCNs 5
- MaskPart IS61C1024AL12JLI%
- IntroductionDate Sep 24, 2004
Parametry
- Address Bus Width (bit) 17
- Architecture N/R
- Burst Length (Words) N/R
- Data Rate Architecture N/R
- Density (bit) 1M
- Density in Bits (bit) 1048576
- Function N/A
- Maximum Access Time (ns) 12
- Maximum Clock Rate (MHz) N/R
- Maximum Storage Temperature (°C) 150
- Minimum Storage Temperature (°C) -65
- Number of Bits per Word (bit) 8
- Number of I/O Lines (bit) 8
- Number of Ports 1
- Number of Words 128K
- Read Latency (Cycles) N/R
- Supplier Temperature Grade Industrial
- Timing Type Asynchronous