EPM7032AELC44-7
| Do pobrania | Download |
|---|---|
| Main description | CPLD MAX 7000A Family 600 Gates 32 Macro Cells 138.9MHz 3.3V 44-Pin PLCC |
CPLD MAX 7000A Family 600 Gates 32 Macro Cells 138.9MHz 3.3V 44-Pin PLCC
Informacje podstawowe
- ProducentAltera/Intel Programmable Solutions
- EURoHSNo (2011/65/EU)
- Automotive No
Informacje dodatkowe
- Crosses 412
- Inventory 4
- PCNs 15
- FoundINBOMs 1
- MaskPart EPM7032AELC447%
- IntroductionDate Oct 08, 1998
- SupplierUrl http://www.altera.com/cgi-bin/devsearch.pl?col=corp&docsetConstraints=&qt=EPM7032AELC44-7&scope=3
Parametry
- Clock Management N/A
- Copy Protection Yes
- Data Gate No
- Device Logic Cells N/A
- Device System Gates 600
- Family Name MAX® 7000A
- I/O Voltage (V) 2.5|3.3
- In-System Programmability Yes
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) 5
- Maximum Internal Frequency (MHz) 166.67
- Maximum Propagation Delay Time (ns) 7.5
- Memory Size (Kbit) N/A
- Number of Flip Flops N/A
- Number of Global Clocks 2
- Number of I/O Banks N/A
- Number of Inter Dielectric Layers N/A
- Number of Logic Blocks/Elements 2
- Number of Macro Cells 32
- Number of Product Terms per Macro 32
- Number of User I/Os 36
- Process Technology N/A
- Program Memory Type EEPROM
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support Yes
- Speed Grade 7
- Supplier Temperature Grade Commercial
- Temperature Flag Opr
- Tolerant Configuration Interface Voltage (V) 2.5|3.3|5
- Tradename MAX