EPM3256ATI144-10

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Main description CPLD MAX 3000A Family 5K Gates 256 Macro Cells 95.2MHz 3.3V 144-Pin TQFP
CPLD MAX 3000A Family 5K Gates 256 Macro Cells 95.2MHz 3.3V 144-Pin TQFP

Informacje podstawowe

  • ProducentAltera/Intel Programmable Solutions
  • EURoHSNo (2011/65/EU)
  • Automotive No

Informacje dodatkowe

  • Crosses 288
  • Inventory 3
  • PCNs 24
  • GIDEP-Alerts 3
  • MaskPart EPM3256ATI14410%
  • IntroductionDate Oct 08, 1998
  • SupplierUrl http://www.altera.com/cgi-bin/devsearch.pl?col=corp&docsetConstraints=&qt=EPM3256ATI144-10&scope=3

Parametry

  • Clock Management N/A
  • Copy Protection Yes
  • Data Gate No
  • Device Logic Cells N/A
  • Device System Gates 5000
  • Family Name MAX® 3000A
  • I/O Voltage (V) 2.5|3.3
  • In-System Programmability Yes
  • Individual Output Enable Control Yes
  • Maximum Clock to Output Delay (ns) 6.4
  • Maximum Internal Frequency (MHz) 125
  • Maximum Operating Current (mA) N/A
  • Maximum Operating Frequency (MHz) 95.2
  • Maximum Operating Supply Voltage (V) 3.6
  • Maximum Operating Temperature (°C) 85
  • Maximum Propagation Delay Time (ns) 10
  • Memory Size (Kbit) N/A
  • Minimum Operating Supply Voltage (V) 3
  • Minimum Operating Temperature (°C) -40
  • Number of Flip Flops N/A
  • Number of Global Clocks 2
  • Number of I/O Banks N/A
  • Number of Inter Dielectric Layers N/A
  • Number of Logic Blocks/Elements 16
  • Number of Macro Cells 256
  • Number of Product Terms per Macro 32
  • Number of User I/Os 116
  • Process Technology N/A
  • Program Memory Type EEPROM
  • Programmability Yes
  • RAM Bits (Kbit) N/A
  • Reprogrammability Support Yes
  • Speed Grade 10
  • Supplier Temperature Grade Industrial
  • Temperature Flag Opr
  • Tolerant Configuration Interface Voltage (V) 2.5|3.3|5
  • Tradename MAX
  • Typical Operating Supply Voltage (V) 3.3
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