EPM1270T144I5N
| Do pobrania | Download |
|---|---|
| Main description | CPLD MAX II Family 980 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 144-Pin TQFP |
CPLD MAX II Family 980 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 144-Pin TQFP
Informacje podstawowe
- ProducentAltera/Intel Programmable Solutions
- EURoHSYes (2011/65/EU)
- Automotive No
Informacje dodatkowe
- Crosses 8
- Inventory 3
- PCNs 25
- GIDEP-Alerts 3
- MaskPart EPM1270T144I5N%
- IntroductionDate Dec 21, 2004
- SupplierUrl http://www.altera.com/cgi-bin/devsearch.pl?col=corp&docsetConstraints=&qt=EPM1270T144I5N&scope=3
Parametry
- Clock Management N/A
- Copy Protection Yes
- Data Gate No
- Device Logic Cells 1270
- Device System Gates N/A
- Family Name MAX® II
- I/O Voltage (V) 1.5|1.8|2.5|3.3
- In-System Programmability Yes
- Individual Output Enable Control Yes
- Maximum Clock to Output Delay (ns) 7.3
- Maximum Internal Frequency (MHz) 1879.7
- Maximum Propagation Delay Time (ns) 10
- Memory Size (Kbit) 8
- Number of Flip Flops N/A
- Number of Global Clocks 4
- Number of I/O Banks 4
- Number of Inter Dielectric Layers 6
- Number of Logic Blocks/Elements 127
- Number of Macro Cells 980
- Number of Product Terms per Macro N/A
- Number of User I/Os 116
- Process Technology 0.18um
- Program Memory Type Flash
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support No
- Speed Grade 5
- Supplier Temperature Grade Industrial
- Temperature Flag Jun
- Tolerant Configuration Interface Voltage (V) 1.8|2.5|3.3|5
- Tradename MAX