CY7C372iL-83JXC

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Main description CPLD FLASH370i Family 1.6K Gates 64 Macro Cells 5V 44-Pin PLCC
CPLD FLASH370i Family 1.6K Gates 64 Macro Cells 5V 44-Pin PLCC

Informacje podstawowe

  • ProducentCypress Semiconductor
  • EURoHSYes (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 337
  • PCNs 24
  • FoundINBOMs 1
  • MaskPart CY7C372iL83JXC%
  • IntroductionDate Jul 28, 2000
  • EnablingEnergyEfficiency No
  • SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY7C372iL-83JXC

Parametry

  • Clock Management N/A
  • Data Gate No
  • Device Logic Cells N/A
  • Device System Gates 1600
  • Family Name FLASH370i
  • I/O Voltage (V) 3.3|5
  • In-System Programmability Yes
  • Individual Output Enable Control No
  • Maximum Clock to Output Delay (ns) 8
  • Maximum Internal Frequency (MHz) N/A
  • Maximum Operating Current (mA) 75
  • Maximum Operating Frequency (MHz) N/A
  • Maximum Operating Supply Voltage (V) 5.25
  • Maximum Operating Temperature (°C) 70
  • Maximum Propagation Delay Time (ns) 15
  • Memory Size (Kbit) N/A
  • Minimum Operating Supply Voltage (V) 4.75
  • Minimum Operating Temperature (°C) 0
  • Number of Flip Flops N/A
  • Number of Global Clocks 2
  • Number of I/O Banks N/A
  • Number of Inter Dielectric Layers N/A
  • Number of Logic Blocks/Elements 4
  • Number of Macro Cells 64
  • Number of Product Terms per Macro 16
  • Number of User I/Os 32
  • Process Technology N/A
  • Program Memory Type Flash
  • Programmability Yes
  • RAM Bits (Kbit) N/A
  • Reprogrammability Support Yes
  • Speed Grade 83
  • Supplier Temperature Grade Commercial
  • Temperature Flag Opr
  • Tolerant Configuration Interface Voltage (V) N/A
  • Typical Operating Supply Voltage (V) 5
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