CY62167DV30LL-55ZXIT
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Main description | SRAM Chip Async Single 3V 16M-bit 1M x 16 55ns 48-Pin TSOP-I T/R |
SRAM Chip Async Single 3V 16M-bit 1M x 16 55ns 48-Pin TSOP-I T/R
Informacje podstawowe
- ProducentCypress Semiconductor
- EURoHSYes (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 65
- Inventory 6*
- PCNs 44
- GIDEP-Alerts 11
- MaskPart CY62167DV30LL55ZXI%
- IntroductionDate Sep 30, 2002
- EnablingEnergyEfficiency No
- SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY62167DV30LL-55ZXIT
Parametry
- Address Bus Width (bit) 20
- Architecture N/R
- Data Rate Architecture N/R
- Density (bit) 16M
- Density in Bits (bit) 16777216
- Function N/A
- Maximum Access Time (ns) 55
- Maximum Clock Rate (MHz) N/R
- Maximum Storage Temperature (°C) 150
- Minimum Storage Temperature (°C) -65
- Number of Bits per Word (bit) 16
- Number of I/O Lines (bit) 16
- Number of Ports 1
- Number of Words 1M
- Supplier Temperature Grade Industrial
- Timing Type Asynchronous