CY62138FV30LL-45ZAXIT

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Main description SRAM Chip Async Single 2.5V/3.3V 2M-bit 256K x 8 45ns 32-Pin STSOP-I T/R
SRAM Chip Async Single 2.5V/3.3V 2M-bit 256K x 8 45ns 32-Pin STSOP-I T/R

Informacje podstawowe

  • ProducentCypress Semiconductor
  • EURoHSYes (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 122
  • Inventory 7*
  • PCNs 44
  • GIDEP-Alerts 12
  • MaskPart CY62138FV30LL45ZAXI%
  • IntroductionDate Jun 11, 2003
  • EnablingEnergyEfficiency No
  • SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY62138FV30LL-45ZAXIT

Parametry

  • Address Bus Width (bit) 18
  • Architecture N/R
  • Data Rate Architecture N/R
  • Density (bit) 2M
  • Density in Bits (bit) 2097152
  • Function N/A
  • Maximum Access Time (ns) 45
  • Maximum Clock Rate (MHz) N/R
  • Maximum Operating Current (mA) 18
  • Maximum Operating Supply Voltage (V) 3.6
  • Maximum Operating Temperature (°C) 85
  • Minimum Operating Supply Voltage (V) 2.2
  • Minimum Operating Temperature (°C) -40
  • Number of Bits per Word (bit) 8
  • Number of I/O Lines (bit) 8
  • Number of Ports 1
  • Number of Words 256K
  • Supplier Temperature Grade Industrial
  • Timing Type Asynchronous
  • Typical Operating Supply Voltage (V) 2.5|3.3
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