CY39100V388B-125MGI
| Do pobrania | Download |
|---|---|
| Main description | CPLD Delta39K Family 100K Gates 1536 Macro Cells 125MHz 0.18um Technology 2.5V/3.3V 388-Pin BGA |
CPLD Delta39K Family 100K Gates 1536 Macro Cells 125MHz 0.18um Technology 2.5V/3.3V 388-Pin BGA
Informacje podstawowe
- ProducentCypress Semiconductor
- EURoHSNo (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 5
- PCNs 24
- FoundINBOMs 1
- MaskPart CY39100V388B125MGI%
- IntroductionDate May 30, 2001
- EnablingEnergyEfficiency No
- SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY39100V388B-125MGI
Parametry
- Clock Management N/A
- Copy Protection No
- Data Gate No
- Device Logic Cells N/A
- Device System Gates 100000
- Family Name Delta39K
- I/O Voltage (V) 1.5|1.8|2.5|3.3
- In-System Programmability Yes
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) N/A
- Maximum Internal Frequency (MHz) N/A
- Maximum Propagation Delay Time (ns) 10
- Maximum Storage Temperature (°C) 150
- Memory Size (Kbit) N/R
- Minimum Storage Temperature (°C) -65
- Number of Flip Flops N/A
- Number of Global Clocks 4
- Number of I/O Banks 8
- Number of Inter Dielectric Layers 6
- Number of Logic Blocks/Elements N/A
- Number of Macro Cells 1536
- Number of Product Terms per Macro 16
- Number of User I/Os 294
- Process Technology 0.18um
- Program Memory Type ROMLess
- Programmability Yes
- RAM Bits (Kbit) 240
- Reprogrammability Support Yes
- Speed Grade 125
- Supplier Temperature Grade Industrial
- Temperature Flag Opr
- Tolerant Configuration Interface Voltage (V) 3.3
- Tradename Delta39K