74AUP1G09FX4-7

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Main description	AND Gate 1-Element 2-IN CMOS 6-Pin X2-DFN T/R

AND Gate 1-Element 2-IN CMOS 6-Pin X2-DFN T/R

Informacje podstawowe

Absolute Propagation Delay Time (ns) 24
Input Type N/A
Logic Family AUP
Logic Function AND
Maximum High Level Output Current (mA) N/A
Maximum Low Level Output Current (mA) 4
Maximum Operating Supply Voltage (V) 3.6
Maximum Operating Temperature (°C) 125
Maximum Propagation Delay Time @ Maximum CL (ns) 19.5@1.1V to 1.3V|16.1@1.4V to 1.6V|15.2@1.65V to 1.95V|13.1@2.3V to 2.7V|12.7@3V to 3.6V
Maximum Quiescent Current (uA) 0.5
Maximum Supply Current (mA) N/A
Minimum Operating Supply Voltage (V) 0.8
Minimum Operating Temperature (°C) -40
Number of Element Inputs 2-IN
Number of Element Outputs 1
Number of Elements per Chip 1
Number of Output Enables per Element 0
Number of Selection Inputs per Element 0
Output Type Open Drain
Process Technology CMOS
Propagation Delay Test Condition (pF) 30
Supplier Temperature Grade N/A
Typical Operating Supply Voltage (V) 1.8|2.5|3.3
Typical Quiescent Current (uA) N/A
Typical Supply Current (mA) N/A